1. Field of the Invention
This invention relates to a driving circuit for an electrostatic recording head used in electrostatic recording such as facsimile or other printing systems.
2. Description of the Prior Art
By using electrostatic recording, high speed and high quality recording is possible; consequently, electrostatic recording is generally used in various recording equipment in which high speed and high quality is required.
The principle of electrostatic recording incorporates electrodes for producing electric discharges which create electrostatic charge patterns forming electrostatic latent images on an electrostatic recording medium. Colored powder particles, charged to an opposite polarity (i.e., toner), are then sprinkled over the electrostatic images for developing the image. Finally, the toner is fixed by heating and recording is thereby accomplished. The composite electrodes which form the electrostatic latent images are called an electrostatic recording head. One of the most popular electrostatic recording heads is a multistylus head. FIG. 1 shows one example of a multistylus head having a base BB. A stylus electrode row SE, comprising several stylus electrodes arranged in a row, are disposed on base BB. On each side of electrode row SE are respective rows of control electrodes CE.sub.1, CE.sub.2, also embedded in base BB. During recording, a high voltage pulse, supplied from a driving circuit, is impressed between the stylus electrode and each of the control electrodes. As a result, electrostatic latent images are formed on an electrostatic recording medium (not shown). In the above description, reference is made to a multistylus head with respective control electrode rows CE.sub.1, CE.sub.2 on each side of stylus electrode row SE. There are, however, recording heads which have no control electrodes. For example, spaced from the head is a surface at ground potential permitting charges to be formed on a paper positioned between the head and the ground potential. In any case, a electrostatic recording head has at least one electrode for forming electostatic latent images on an electrostatic recording medium. A driving circuit for generating high voltage pulses is coupled to this electrode. The present invention relates to such a circuit.
FIG. 2 shows a conventional driving circuit for an electrostatic recording head. A driving circuit is provided for each electrode of the recording head. A driving signal indicating whether a high voltage pulse is to be supplied to the corresponding electrode is supplied to an input terminal 1. This signal is supplied, via a coupling capacitor C.sub.1 and an input resistor R.sub.1, to the base of a transistor TR.sub.1. A power source (not shown) supplies -E voltage to the emitter of TR.sub.1. If the level of the driving signal is high, transistor TR.sub.1 turns ON and the high voltage -E is supplied to an output terminal 3 through a resistor R.sub.4 which controls the output current. In this conventional circuit, resistor R.sub.2 is a base breeder resistor and resistor R.sub.3 is a collector resistor.
FIGS. 3a and 3b show the waveforms of the input signal IN supplied to terminal 1 and the output signal OUT from terminal 3 of the circuit shown in FIG. 2. W represents the time period (i.e., recording time period) the recording signals are supplied to the circuit. In these figures, time T.sub.a is the turn-on delay time and time T.sub.b is the storage time and time T.sub.c is the turn-off time of transistor TR.sub.1, respectively. The turn-off delay time is the sum of T.sub.b and T.sub.c. Such delays are undesirable in electrostatic driving circuits since printing speed is adversely effected and ghosts are produced during printing. In order to speed up the response of this driving circuit, it is desirable to shorten turn-on time T.sub.a, storage time T.sub.b and turn-off time T.sub.c. For example, if turn-on time T.sub.a is substantially long as compared with the pulse width W, the output will not sufficiently rise within the impressing time of the input signal. If either storage time T.sub.b or turn-off time T.sub.c is substantially long, one driving signal output will overlap with its next adjacent driving signal output; as a result, noise occurs producing ghosts which appear in the recorded image. In the circuit shown in FIG. 2, turn-on time T.sub.a can be shortened by increasing the current supplied to the base of TR.sub.1. However, if the base current is increased, storage time T.sub.b will concomitantly increase. Therefore, in order to shorten both time T.sub.a and time T.sub.b, the value of the base current must be compromised. The delay in turn-off time T.sub.c is caused by the inherent capacitance of the collector of transistor TR.sub.1 and the capacitance between the electrodes of the load (not shown). Time T.sub.c can be shortened by reducing the collector resistor R.sub.3. However, in doing this, the current capacity of high voltage source E must be increased. Increasing the capacity of the power source is very impractical and expensive, thus sufficient high-speed action cannot be obtained from the circuit shown in FIG. 2.
Another conventional circuit which attempts to reduce turn-off time T.sub.c is the circuit shown in FIG. 4. In FIG. 4, a circuit comprising transistor TR.sub.2 and diode CD.sub.1 is added to the collector of transistor TR.sub.1 of the circuit shown in FIG. 2; the other elements of this circuit are the same as shown in FIG. 2. In this circuit, during the time the collector voltage of transistor TR.sub.1 rises to OV, transistor TR.sub.2 operates as emitter-follower, driving the capacitance which exists between the load electrodes. During this time, the low impedance between the emitter-collector of TR.sub.2 discharges the capacitor between the electrodes and by-passes resistor R.sub.3. Consequently, the adverse effect caused by collector resistor R.sub.3 and the load capacitor is reduced. Diode CD.sub.1 is needed to permit current flow to the load during times T.sub.a and T.sub.b so the capacitor between the electrodes can charge during those times. This circuit design, however, does not improve time T.sub.a and T.sub.b. Moreover, the effect on turn-off time T.sub.c caused by the inherent collector capacitor of transistor TR.sub.1 is also not improved. Rather, this circuit design only reduces the effect caused by the capacitance between the electrodes.
A further conventional circuit which attempts to reduce the current capacity of the source while permitting reduction of turn-off time T.sub.c is the circuit shown in FIG. 5. In this circuit, a transistor TR.sub.3 which is complementary to transistor TR.sub.1 is utilized. The collector of TR.sub.3 is connected via output resistors R.sub.41, R.sub.42 to the collector of transistor TR.sub.1. The emitter of transistor TR.sub.3 is grounded, and its base is connected via a resistor R.sub.5 to input terminal 1. The connecting point between rsistors R.sub.41, R.sub.42 is connected to the output terminal 3. A resistor R.sub.6 is a base breeder resistor for transistor TR.sub.3.
In this circuit, transistor TR.sub.3 is on during the time transistor TR.sub.1 is off, and is off during the time transistor TR.sub.1 is on. That is, during the time transistor TR.sub.1 is on, collector current does not flow in transistor TR.sub.1 via transistor TR.sub.2. Collector current of TR.sub.1, however, flows via output resistors R.sub.41 to the load capacitor only when it is being charged. Likewise, the collector current of TR.sub.3 flows via resistor R.sub.42 from the load capacitor when it is being discharged. Thus, when transistor TR.sub.1 is on, there is no additional current flow from ground via TR.sub.3 through TR.sub.1 ; likewise, when TR.sub.3 is on, there is no additional current flow from ground via TR.sub.3 through TR.sub.1. Accordingly, it is not necessary for the high voltage source to supply the additional current; rather, it must supply only the charging or discharging current. Accordingly, the capacity of the high voltage source can be reduced. The discharging path of the capacitor load through TR.sub.3 has a low resistance path substantially the same as the current of FIG. 4; consequently, T.sub.c is reduced. Furthermore, the problem of turn-off time due to the collector capacitor of transistor TR.sub.1, the problem encountered with the circuit of FIG. 4, is improved because a collector resistor R.sub.3 is not utilized. That is, the charges collected in the collector capacitor of transistor TR.sub.1 is discharged via output resistor R.sub.42 and transistor TR.sub.3 ; thus turn-off time T.sub.c due to the collector capacitor of transistor TR.sub.1 is shortened. However, this circuit, like the circuit of FIG. 4, has a turn-on time T.sub.a and storage time T.sub.b whichare not improved.